Transforming Audio Product Verification: Aparna Mohan's Framework Revolution

Aparna Mohan has led the development and implementation of a standardized digital and mixed-signal verification framework at Cirrus Logic, applicable across all audio product lines. This initiative addresses the challenge of creating a reusable verification environment to test the complex intersection of digital and analog domains in modern audio chips.

The framework, designed under Aparna's leadership, formalizes verification methodology, simplifying the integration process for new projects. It establishes a portable and reusable verification environment, enabling early bug discovery and streamlining the overall verification process.

The implementation of this framework has improved verification processes across multiple product lines. It significantly reduces the time required to establish robust verification environments for new designs and facilitates faster onboarding of new engineers.

The framework's success was recognized at the Cirrus Logic Innovation Conference 2017. Aparna Mohan's contributions have been acknowledged through her promotion to Senior Design Verification Engineer. She also serves on the technical program committee of the DVCON 2025 Europe conference and as an industry expert judge for the Globee awards.

Aparna Mohan is a Design Verification Engineer with over 11 years of experience in pre-silicon verification and methodology implementation. Her expertise includes functional verification methodologies (UVM, System Verilog), SVA, and formal verification techniques. Aparna holds a Master's degree from North Carolina State University and a Bachelor's degree from the University of Kerala.

Her career includes contributions to the Indian Space Research Organization and ongoing involvement in scholarly research and mentorship programs. Aparna is a published researcher and regular presenter at industry events.

Based on reporting by hackernoon.com.